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Free download of Sikkim Manipal University, SMU previous year, last year, sample question paper for  : [Computer Organization and Architecture ] BT0068 . Find question and answer for Part-A 2 marks, Part-B 4 Marks and Part-C 8 marks. Free download of question paper of previous year test.   Computer Organization and Architecture , BT0068 question paper includes multiple choice options and answer also.

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   SMU >> BSc IT >> BT0068

   Computer Organization and Architecture

This is the collection of Sikkim Manipal University (SMU) question paper for BSc IT - Computer Organization and Architecture . It will help you to prepare your examination. All questions are classified as per question type like PART - A of 2 marks, PART - B of 4 marks and PART - C of 8 marks same as actual examination. SMU question paper set which includes year 2017, 2016, 2015 SMU question papers of Computer Organization and Architecture are updated regularly and it is absolutely free to use. SMU Question paper includes multiple choice question and answer as same as real and original examination. It will help you to study and prepare for your final SMU examination.

Sikkim Manipal University
SMU Question Paper
Latest and Updated
FREE to Download
  1. BCA
  2. MCA
  3. BSc IT
  4. MSc IT
  5. MBA


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Course Name
        BSc IT (Bachelor of Science in Information Technology)

Subject Code      
BT0068 (Computer Organization and Architecture )

Get Questions        PART - A    PART - B    PART - C


Computer Organization and Architecture Syllabus.

Unit 1: Data Representation in Computers
Digital Computers; Data Types; Complements; Fixed-Point Representation; Floating-Point Representation; Other Binary Codes;

Unit 2: Register
Transfer and Micro operations Register Transfer Language; Register Transfer; Bus and Memory Transfers; Arithmetic Microoperations; Logic Microoperations; Shift Microoperations; Arithmetic Logic Shift Unit.

Unit 3: Basic Structure of a Digital Computer
Mechanical and Electromechanical Ancestors; Structure of a Computer System; Arithmetic Logic Unit; Control Unit; Bus Structure; on Neumann Architecture.

Unit 4: CPU and Register
Organization Registers; User-Visible Registers; Control and Status Registers; Program Status Word (PSW); CPU Organization; Fundamental Computer Architecture; CPU organization in 8085 microprocessor. Register Organization of different machine; The Zilog Z8000 machine; Intel 8086 machine; Motorola 68000 machine. Instruction cycles; Basic instruction cycle; Basic instruction Cycle state diagram.

Unit 5: Interconnection Structures
Types of exchange of information: Modules of a System, Different types of transfers; Types of Buses; Elements of Bus Design: Bus Types, Method of arbitration, Bus Timing, Bus width; Bus Speed; Bus Structure: Single Bus System, Two Bus Organization, The Bus Standard.

Unit 6: Instruction Sets;
Addressing Modes and Formats Instruction Characteristics: Instruction representation, Instruction types, Number of addresses; Instruction Set Design; Types of Operands: Data types, IBM 370 Data types, VAX Data types; Types of Operations: Data transfer, Arithmetic, Logical, Conversion; I/O, System control; Transfer of control, System Control ;Addressing Modes: Direct addressing mode, Immediate addressing mode, Indirect addressing mode, Register addressing mode, Register indirect addressing mode, Displacement addressing mode, Relative addressing mode.

Unit 7: Arithmetic Logic Unit
Arithmetic Logic Unit; Number Representations: On-negative Integers, Negative Integers; Infinite-Precision Ten's Complement, Finite-Precision Ten's Complement, Finite-Precision Two's Complement, Rational Numbers.

Unit 8: Binary Arithmetic
Binary Arithmetic: Overflow in Integer Arithmetic, Binary Addition, Subtraction, another Note on Overflow, Multiplication, Unsigned Integer Multiplication, Straightforward Method, Unsigned Integer Multiplication, A More Efficient Method, Positive Integer Multiplication; Signed Integer Multiplication, Division; Floating Point Numbers: Floating Point Variables, Floating Point Arithmetic, Addition of Floating-Point Numbers, Time for Floating-Point Addition, Pipelined Floating-Point Addition, Real Numbers.

Unit 9: Memory Unit – Part I
Characteristics of Memory Systems, Main Memory, Types of Random-Access Semiconductor Memory, Organization, Static and dynamic memories; Memory system considerations, Design of memory subsystem using Static Memory Chips, Design of memory subsystem using Dynamic Memory Chips; Memory interleaving.

Unit 10: Memory Unit – Part II
Cache Memory: Principles of cache memory, Structure of cache and main memory, Performance using cache memory, Elements of Cache Design. Mapping functions, Replacement algorithms; External Memory, Magnetic Disk, RAID; Virtual memory; Memory Management in Operating Systems.

Unit 11: Input / Output
Basics External Devices: Classification of external devices, Input / Output problems; Input / Output Module: I/O Module Function, I/O Module Decisions, Input Output Techniques; Programmed I/O:I/O commands, I/O instructions; Interrupt Driven I/O:Basic concepts of an Interrupt, Response of CPU to an Interrupt, Design Issues, Priorities,Interrupt handling, Types of Interrupts.

Unit 12: Direct Memory Access
Direct Memory Access: DMA Function and Operation, DMA Configurations; DMA Controller: DMA Transfer Types, DMA Transfer modes, DMA Controller Operation, Advantages. Synchronization Requirements for DMA and Interrupts: Synchronization with Interrupts, Synchronization with DMA.

  Get Questions        PART - A    PART - B    PART - C



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